I see that two of my favorite devices are now EOL.
BFU520A NXP 10 GHz NPN, 50 mA. About the best replacement for the BFT25A.
BFP640 and BFP650 SiGe NPN. Ridiculous Early voltage, 45 GHz , flat beta, >super low noise.
I?ve ordered a reel or two of each, because I refuse to give up that much >design space.
Foo.
Phil Hobbs
On Sat, 12 Sep 2026 21:20:56 -0000 (UTC), Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:
I see that two of my favorite devices are now EOL.
BFU520A NXP 10 GHz NPN, 50 mA. About the best replacement for the BFT25A.
BFP640 and BFP650 SiGe NPN. Ridiculous Early voltage, 45 GHz , flat beta,
super low noise.
I?ve ordered a reel or two of each, because I refuse to give up that much
design space.
Foo.
Phil Hobbs
Yeah, fast discretes are going away. I guess all the mass-market stuff
is using ICs now.
The c-b junction of the BFT25 was a nice diode, too. I measured 5 fA
leakage.
And there seem to be no fast PNPs any more!
I sure hope the SAV parts stay around. I'm planning on using them in a
pulse generator. That's a whole nother story.
On 2026-09-12 17:53, john larkin wrote:
On Sat, 12 Sep 2026 21:20:56 -0000 (UTC), Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:
I see that two of my favorite devices are now EOL.
BFU520A NXP 10 GHz NPN, 50 mA. About the best replacement for the BFT25A. >>>
BFP640 and BFP650 SiGe NPN. Ridiculous Early voltage, 45 GHz , flat beta, >>> super low noise.
I?ve ordered a reel or two of each, because I refuse to give up that much >>> design space.
Foo.
Phil Hobbs
Yeah, fast discretes are going away. I guess all the mass-market stuff
is using ICs now.
The c-b junction of the BFT25 was a nice diode, too. I measured 5 fA
leakage.
And there seem to be no fast PNPs any more!
I sure hope the SAV parts stay around. I'm planning on using them in a
pulse generator. That's a whole nother story.
Yup. I use a lot of CPH3910, BFU520A, BFP640F or H, and a few others,
in all sorts of things including TDRs and front ends.
Looking to have JLCPCB hold some in stock for us to tide us over.
We've been investigating doing our own array parts, as a first step to
doing our own ASICs. TinyTapeout lists a couple of BiCMOS processes
with SiGe NPNs **and PNPs** with f_T between 130 and 350 GHz.
That's inconveniently high for what we do--we mostly care about high f_T
at low collector current, good beta linearity, and very high Early voltage.
A start would be to make some 130 GHz SiGe NPN/PNP arrays with 0.5 pF or
so connected from C to B (on chip) to slow them down a bit so that we
can route them without making 30 GHz oscillators.
It'll need more work than just wiring up some BFP640s.
Cheers
Phil Hobbs
I see that two of my favorite devices are now EOL.
BFU520A NXP 10 GHz NPN, 50 mA. About the best replacement for the BFT25A.
BFP640 and BFP650 SiGe NPN. Ridiculous Early voltage, 45 GHz , flat beta, super low noise.
I?ve ordered a reel or two of each, because I refuse to give up that much design space.
Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:
I wonder how the defense industry can proceed without such gems.
I see that two of my favorite devices are now EOL.
BFU520A NXP 10 GHz NPN, 50 mA. About the best replacement for the BFT25A. >>
BFP640 and BFP650 SiGe NPN. Ridiculous Early voltage, 45 GHz , flat beta,
super low noise.
I?ve ordered a reel or two of each, because I refuse to give up that much
design space.
On 2026-09-12 17:53, john larkin wrote:
On Sat, 12 Sep 2026 21:20:56 -0000 (UTC), Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:
I see that two of my favorite devices are now EOL.
BFU520A NXP 10 GHz NPN, 50 mA. About the best replacement for the
BFT25A.
BFP640 and BFP650 SiGe NPN. Ridiculous Early voltage, 45 GHz , flat
beta,
super low noise.
I?ve ordered a reel or two of each, because I refuse to give up that
much
design space.
Foo.
Phil Hobbs
Yeah, fast discretes are going away. I guess all the mass-market stuff
is using ICs now.
The c-b junction of the BFT25 was a nice diode, too. I measured 5 fA
leakage.
And there seem to be no fast PNPs any more!
I sure hope the SAV parts stay around. I'm planning on using them in a
pulse generator. That's a whole nother story.
Yup.ÿ I use a lot of CPH3910, BFU520A, BFP640F or H, and a few others,
in all sorts of things including TDRs and front ends.
Looking to have JLCPCB hold some in stock for us to tide us over.
We've been investigating doing our own array parts, as a first step to
doing our own ASICs.ÿÿ TinyTapeout lists a couple of BiCMOS processes
with SiGe NPNs **and PNPs** with f_T between 130 and 350 GHz.
On 13/09/2026 10:37 am, Phil Hobbs wrote:
[...] TinyTapeout lists a couple of BiCMOS processes with SiGe NPNs
**and PNPs** with f_T between 130 and 350 GHz.
Which ones? I thought TinyTapeout was just digital CMOS and that you
had to use their IO cells (which would ruin the fun).
I'm having a go at doing block for a chip right now: https://opencircuitdesign.com/chipalooza/
Also just CMOS, but we can do custom pads, and someone else is paying
for the tapeout so it's good practice, and the IHPSG13CMOS5L is a
subset of their BiCMOS process with good NPNs, so hopefully the
experience is relevant to the better process for later.
Chris Jones <lugnut808@spam.yahoo.com> writes:
On 13/09/2026 10:37 am, Phil Hobbs wrote:
[...] TinyTapeout lists a couple of BiCMOS processes with SiGe NPNs
**and PNPs** with f_T between 130 and 350 GHz.
Which ones? I thought TinyTapeout was just digital CMOS and that you
had to use their IO cells (which would ruin the fun).
They've broadened out beyond CMOS and digital. IHP?s SG13G2 process specifically, which has an open-source PDK. I think originally you were right about needing digital I/O, but that improved. I do imagine the
I/O drivers may have trouble with 30GHz though.
I am somewhat puzzled about why someone would do a digital design with
Tiny Tapeout, other than as a classroom exercise, and the turnaround
time is a bit long for that. Maybe to list on your CV?
You presumably aren?t going to be able to run your digital design at
30GHz even if you?re using a 350GHz fT SiGe BiCMOS process (why not?) so
it?s just going to be inferior to off-the-shelf parts. But you could
easily imagine a custom 130nm analog chip being the best choice for a
design.
Relevant bookmarks from 02025-02-23:
https://github.com/IHP-GmbH/IHP-Open-PDK #IHP 130nm BiCMOS Open Source
#PDK for analog, mixed-signal and RF design. Work in progress, but
they?re doing their first #Tiny-Tapeout already. ?SG13G2 is a high performance BiCMOS technology with a 0.13 ?m CMOS process. It contains bipolar devices based on SiGe:C npn-HBT?s with up to 350 GHz transition frequency (fT) and 450 GHz oscillation frequency (fmax).? #electronics #hardware
https://tinytapeout.com/runs/ttihp0p2/ #IHP Tiny Tapeout. Mostly just digital #electronics #hardware designs.
https://www.ihp-microelectronics.com/services/research-and-prototyping-service/mpw-prototyping-service/schedule-price-list
#IHP #pricing for their 130nm and 250nm processes. Their #MPW price for
the SG13G2 process for which they offer an open-source #PDK is
?7300/mmı. ?minimum area requirement of only 0.8 mmı for all runs with
bold shipment times.? However, no shipment times appear to be in bold,
and the normal minimum seems to be 10mmı. Looks like the tape-in-to-shipment-time delay for MPWs is about 6 months. You get 40
diced samples. I?m guessing you can do about 2.5 transistors per ?mı in
the 130nm process, so 0.8mmı is about 2 million transistors.
https://fdl-conference.com/doc/openpdk_5Sep24-FDL_SAndreev.pdf #PDF
slides on the first year of the #IHP open-source 130nm SG13G2 #PDK. ?a
200mm pilot line for state-of-the-art BiCMOS technologies, operated
under industry-like conditions, 24/7, for the provision of prototypes
and low-volume production runs.? MIM caps are 1.5fF/?mı, or 2.1 for
copper.
https://www.hackster.io/news/ihp-offers-open-source-chip-designs-a-shot-at-a-free-130nm-bicmos-production-run-b88d98620be9
The open-source #IHP #PDK middle of last year: ?Designs already
submitted for production include a delta-sigma modulator put together as
part of Boris Murmann?s electronic engineering course at the University
of Hawai?i at M?noa, a 24GHz low-noise amplifier (LNA) from Martin
Sander at Ulm University, a different LNA targeting cellular devices
from a team at the Friedrich-Alexander-Universit„t Erlangen-Nrnberg
(FAU), and a simple RISC-V CPU designed by Daniel Schultz and Steffen
Reith.? #hardware #electronics
From 02025-02-16:
https://www.youtube.com/watch?v=Eu_crbcBdNM #video #toread by Pat Deegan
on #electronics #hardware #analog #ASIC design with Tiny Tapeout. Demonstrates how to use xschem.
From 02024-06-02:
https://www.youtube.com/watch?v=Eu_crbcBdNM 40' #video by #Psychogenic-Technologies (Pat Deegan) on designing analog ASIC
#electronics #hardware using Tiny Tapeout?s ?new analog capabilities?. Basically he?s hacking together a SAR ADC with an 8-stage resistor
ladder, although most of that process is omitted; he submitted it to
Tiny Tapeout 6 as ?WoWA?. I didn?t realize #Tiny-Tapeout had a WebGL
GDS viewer. The video has an annoying amount of talking-head filler.
He recommends using `tinytapeout_analog_vm` to get started quickly, and Efabless?s video, ?Webinar - Analog schematic capture & simulation with Stefan Schippers?, who wrote #Xschem, which he?s using here, with the
open SKY130 PDK. He remapped Magic?s and Xschem?s keys to match Kicad.
He says both Kicad and Xschem do simulations in Ngspice. Xschem?s UI
for exploring simulation results looks pretty interesting, being able to click on a waveform out of many waveforms on a plot to change which
waveforms are displayed in other linked plots. He does a little bit of
demo of using Magic, which evidently involves typing Tcl commands in a command window as you use the mouse, and he lays out a two-MOSFET mixer circuit in it, with guard rings and everything, after having designed
and simulated it first in Xschem. He says Netgen (?) is a good LVS
(layout vs. schematic) checker, even though its errors are hard to understand. He recommends simulating your digital blocks with
Verilator.
I'm having a go at doing block for a chip right now:
https://opencircuitdesign.com/chipalooza/
Also just CMOS, but we can do custom pads, and someone else is paying
for the tapeout so it's good practice, and the IHPSG13CMOS5L is a
subset of their BiCMOS process with good NPNs, so hopefully the
experience is relevant to the better process for later.
That sounds extremely exciting. I hope to hear more!
Kragen
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